LLVM-RTDYLD(1) User Commands LLVM-RTDYLD(1)
NAME
llvm-rtdyld - manual page for llvm-rtdyld 11
DESCRIPTION
OVERVIEW: llvm MC-JIT tool
USAGE: llvm-rtdyld [options] <input files> --args <program argu-
ments>...
OPTIONS:
Color Options:
--color - Use colors in out-
put (default=autodetect)
General options:
--aarch64-neon-syntax=<value> - Choose style of
NEON code to emit from AArch64 backend:
=generic
- Emit generic NEON assembly
=apple - Emit Apple-style NEON assembly
--amdgpu-bypass-slow-div - Skip 64-bit divide
for dynamic 32-bit values
--amdgpu-disable-loop-alignment - Do not align and
prefetch loops
--amdgpu-disable-power-sched - Disable scheduling
to minimize mAI power bursts
--amdgpu-dpp-combine - Enable DPP com-
biner
--amdgpu-dump-hsa-metadata - Dump AMDGPU HSA
Metadata
--amdgpu-enable-global-sgpr-addr - Enable use of SGPR
regs for GLOBAL LOAD/STORE instructions
--amdgpu-enable-merge-m0 - Merge and hoist M0
initializations
--amdgpu-promote-alloca-to-vector-limit=<uint> - Maximum byte size
to consider promote alloca to vector
--amdgpu-reserve-vgpr-for-sgpr-spill - Allocates one VGPR
for future SGPR Spill
--amdgpu-sdwa-peephole - Enable SDWA peep-
holer
--amdgpu-verify-hsa-metadata - Verify AMDGPU HSA
Metadata
--amdgpu-vgpr-index-mode - Use GPR indexing
mode instead of movrel for vector indexing
--args <string>... - <program argu-
ments>...
--arm-add-build-attributes -
--arm-implicit-it=<value> - Allow conditional
instructions outdside of an IT block
=always
- Accept in both ISAs, emit implicit ITs in Thumb
=never - Warn in ARM, reject in Thumb
=arm - Accept in ARM, reject in Thumb
=thumb - Warn in ARM, emit implicit ITs in Thumb
--atomic-counter-update-promoted - Do counter update
using atomic fetch add
for promoted counters only
--atomic-first-counter - Use atomic fetch
add for first counter in a function (usually the entry counter)
--bounds-checking-single-trap - Use one trap block
per function
--cfg-hide-deoptimize-paths -
--cfg-hide-unreachable-paths -
--check=<string> - File containing
RuntimeDyld verifier checks.
--cost-kind=<value> - Target cost kind
=throughput
- Reciprocal throughput
=latency
- Instruction latency
=code-size
- Code size
--cvp-dont-add-nowrap-flags -
--debugify-level=<value> - Kind of debug info
to add
=locations
- Locations only
=location+variables
- Locations and Variables
--debugify-quiet - Suppress verbose
debugify output
--disable-promote-alloca-to-lds - Disable promote
alloca to LDS
--disable-promote-alloca-to-vector - Disable promote
alloca to vector
--do-counter-promotion - Do counter regis-
ter promotion
--dylib=<string> - Add library.
--emscripten-cxx-exceptions-allowed=<string> - The list of func-
tion names in which Emscripten-style exception handling is en-
abled (see emscripten EMSCRIPTEN_CATCHING_ALLOWED options)
--enable-cse-in-irtranslator - Should enable CSE
in irtranslator
--enable-cse-in-legalizer - Should enable CSE
in Legalizer
--enable-emscripten-cxx-exceptions - WebAssembly Em-
scripten-style exception handling
--enable-emscripten-sjlj - WebAssembly Em-
scripten-style setjmp/longjmp handling
--enable-gvn-hoist - Enable the GVN
hoisting pass (default = off)
--enable-gvn-memdep -
--enable-gvn-sink - Enable the GVN
sinking pass (default = off)
--enable-load-in-loop-pre -
--enable-load-pre -
--enable-loop-simplifycfg-term-folding -
--enable-name-compression - Enable name/file-
name string compression
--entry=<string> - Function to call
as entry point.
--gpsize=<uint> - Global Pointer Ad-
dressing Size.
The default size is 8.
--hash-based-counter-split - Rename counter
variable of a comdat function based on cfg hash
--hot-cold-split - Enable hot-cold
splitting pass
--import-all-index - Import all exter-
nal functions in index.
--instcombine-code-sinking - Enable code sink-
ing
--instcombine-guard-widening-window=<uint> - How wide an in-
struction window to bypass looking for another guard
--instcombine-max-iterations=<uint> - Limit the maximum
number of instruction combining iterations
--instcombine-max-num-phis=<uint> - Maximum number
phis to handle in intptr/ptrint folding
--instcombine-maxarray-size=<uint> - Maximum array size
considered when doing a combine
--instcombine-negator-enabled - Should we attempt
to sink negations?
--instcombine-negator-max-depth=<uint> - What is the maxi-
mal lookup depth when trying to check for viability of negation
sinking.
--instrprof-atomic-counter-update-all - Make all profile
counter updates atomic (for testing only)
--internalize-public-api-file=<filename> - A file containing
list of symbol names to preserve
--internalize-public-api-list=<list> - A list of symbol
names to preserve
--iterative-counter-promotion - Allow counter pro-
motion across the whole loop nest.
--lto-embed-bitcode - Embed LLVM bitcode
in object files produced by LTO
--lto-pass-remarks-filter=<regex> - Only record opti-
mization remarks from passes whose names match the given regular
expression
--lto-pass-remarks-format=<format> - The format used
for serializing remarks (default: YAML)
--lto-pass-remarks-output=<filename> - Output filename
for pass remarks
--matrix-default-layout=<value> - Sets the default
matrix layout
=column-major
- Use column-major layout
=row-major
- Use row-major layout
--max-counter-promotions=<int> - Max number of al-
lowed counter promotions
--max-counter-promotions-per-loop=<uint> - Max number counter
promotions per loop to avoid increasing register pressure too
much
--mcpu=<cpu-name> - Target a specific
cpu type (-mcpu=help for details)
--memop-size-large=<uint> - Set large value
thresthold in memory intrinsic size profiling. Value of 0 dis-
ables the large value profiling.
--memop-size-range=<string> - Set the range of
size in memory intrinsic calls to be profiled precisely, in a
format of <start_val>:<end_val>
--merror-missing-parenthesis - Error for missing
parenthesis around predicate registers
--merror-noncontigious-register - Error for register
names that aren't contigious
--mhvx - Enable Hexagon
Vector eXtensions
--mhvx=<value> - Enable Hexagon
Vector eXtensions
=v60 - Build for HVX v60
=v62 - Build for HVX v62
=v65 - Build for HVX v65
=v66 - Build for HVX v66
=v67 - Build for HVX v67
--mips-compact-branches=<value> - MIPS Specific:
Compact branch policy.
=never
- Do not use compact branches if possible.
=optimal
- Use compact branches where appropriate (default).
=always
- Always use compact branches if possible.
--mips16-constant-islands - Enable mips16 con-
stant islands.
--mips16-hard-float - Enable mips16 hard
float.
--mir-strip-debugify-only - Should
mir-strip-debug only strip debug info from debugified modules by
default
--mno-compound - Disable looking
for compound instructions for Hexagon
--mno-fixup - Disable fixing up
resolved relocations for Hexagon
--mno-ldc1-sdc1 - Expand double pre-
cision loads and stores to their single precision counterparts
--mno-pairing - Disable looking
for duplex instructions for Hexagon
--mwarn-missing-parenthesis - Warn for missing
parenthesis around predicate registers
--mwarn-noncontigious-register - Warn for register
names that arent contigious
--mwarn-sign-mismatch - Warn for mismatch-
ing a signed and unsigned value
--no-discriminators - Disable generation
of discriminator information.
--nvptx-sched4reg - NVPTX Specific:
schedule for register pressue
--poison-checking-function-local - Check that returns
are non-poison (for testing)
--preallocate=<ulong> - Allocate memory
upfront rather than on-demand
--r600-ir-structurize - Use StructurizeCFG
IR pass
--rdf-dump -
--rdf-limit=<uint> -
--runtime-counter-relocation - Enable relocating
counters at runtime.
--safepoint-ir-verifier-print-only -
--sample-profile-check-record-coverage=<N> - Emit a warning if
less than N% of records in the input profile are matched to the
IR.
--sample-profile-check-sample-coverage=<N> - Emit a warning if
less than N% of samples in the input profile are matched to the
IR.
--sample-profile-max-propagate-iterations=<uint> - Maximum number of
iterations to go through when propagating sample block/edge
weights through the CFG.
--show-times - Show times for
llvm-rtdyld phases
--speculative-counter-promotion-max-exiting=<uint> - The max number of
exiting blocks of a loop to allow
speculative counter promotion
--speculative-counter-promotion-to-loop - When the option is
false, if the target block is in a loop, the promotion will be disal-
lowed unless the promoted counter
update can be further/iteratively promoted into an acyclic re-
gion.
--summary-file=<string> - The summary file
to use for function importing.
--tail-predication=<value> - MVE tail-predica-
tion options
=disabled
- Don't tail-predicate loops
=enabled-no-reductions
- Enable tail-predication, but not for reduction loops
=enabled
- Enable tail-predication, including reduction loops
=force-enabled-no-reductions
- Enable tail-predication, but not for reduction loops, and
force this which might be unsafe
=force-enabled
- Enable tail-predication, including reduction loops, and
force this which might be unsafe
--threads=<int> -
--triple=<string> - Target triple for
disassembler
Action to perform:
--execute - Load, link, and ex-
ecute the inputs.
--printline - Load, link, and
print line information for each function.
--printdebugline - Load, link, and
print line information for each function using the debug object
--printobjline - Like -printlineinfo
but does not load the object first
--verify - Load, link and ver-
ify the resulting memory image.
--verify-region-info - Verify region info
(time consuming)
--vp-counters-per-site=<number> - The average number
of profile counters allocated per value profiling site.
--vp-static-alloc - Do static counter
allocation for value profiler
--x86-align-branch=<string> - Specify types of
branches to align (plus separated list of types):
jcc indicates conditional jumps fused indicates fused
conditional jumps jmp indicates direct unconditional jumps
call indicates direct and indirect calls ret indicates
rets indirect indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint> - Control how the
assembler should align branches with NOP. If the boundary's size
is not 0, it should be a power of 2 and no less than 32.
Branches will be aligned to prevent from being across or against
the boundary of specified size. The default value 0 does not
align branches.
--x86-branches-within-32B-boundaries - Align selected in-
structions to mitigate negative performance impact of Intel's micro
code update for errata skx102.
May break assumptions about labels corresponding to particular
instructions, and should be used with caution.
--x86-pad-max-prefix-size=<uint> - Maximum number of
prefixes to use for padding
Generic Options:
--help - Display available
options (--help-hidden for more)
--help-list - Display list of
available options (--help-list-hidden for more)
--version - Display the ver-
sion of this program
Polly Options: Configure the polly loop optimizer
--polly - Enable the polly
optimizer (only at -O3)
--polly-2nd-level-tiling - Enable a 2nd level
loop of loop tiling
--polly-ast-print-accesses - Print memory ac-
cess functions
--polly-context=<isl parameter set> - Provide additional
constraints on the context parameters
--polly-dce-precise-steps=<int> - The number of pre-
cise steps between two approximating iterations. (A value of -1
schedules another approximation stage before the actual dead
code elimination.
--polly-delicm-max-ops=<int> - Maximum number of
isl operations to invest for lifetime analysis; 0=no limit
--polly-detect-full-functions - Allow the detec-
tion of full functions
--polly-dump-after - Dump module after
Polly transformations into a file suffixed with "-after"
--polly-dump-after-file=<string> - Dump module after
Polly transformations to the given file
--polly-dump-before - Dump module before
Polly transformations into a file suffixed with "-before"
--polly-dump-before-file=<string> - Dump module before
Polly transformations to the given file
--polly-enable-simplify - Simplify SCoP af-
ter optimizations
--polly-ignore-func=<string> - Ignore functions
that match a regex. Multiple regexes can be comma separated.
Scop detection will ignore all functions that match ANY of the
regexes provided.
--polly-isl-arg=<argument> - Option passed to
ISL
--polly-on-isl-error-abort - Abort if an isl
error is encountered
--polly-only-func=<string> - Only run on func-
tions that match a regex. Multiple regexes can be comma sepa-
rated. Scop detection will run on all functions that match ANY
of the regexes provided.
--polly-only-region=<identifier> - Only run on cer-
tain regions (The provided identifier must appear in the name of
the region's entry block
--polly-only-scop-detection - Only run scop de-
tection, but no other optimizations
--polly-optimized-scops - Polly - Dump poly-
hedral description of Scops optimized with the isl scheduling
optimizer and the set of post-scheduling transformations is ap-
plied on the schedule tree
--polly-parallel - Generate thread
parallel code (isl codegen only)
--polly-parallel-force - Force generation
of thread parallel code ignoring any cost model
--polly-pattern-matching-based-opts - Perform optimiza-
tions based on pattern matching
--polly-process-unprofitable - Process scops that
are unlikely to benefit from Polly optimizations.
--polly-register-tiling - Enable register
tiling
--polly-report - Print information
about the activities of Polly
--polly-show - Highlight the code
regions that will be optimized in a (CFG BBs and LLVM-IR in-
structions)
--polly-show-only - Highlight the code
regions that will be optimized in a (CFG only BBs)
--polly-stmt-granularity=<value> - Algorithm to use
for splitting basic blocks into multiple statements
=bb - One statement per basic block
=scalar-indep
- Scalar independence heuristic
=store - Store-level granularity
--polly-target=<value> - The hardware to
target
=cpu - generate CPU code
--polly-tiling - Enable loop tiling
--polly-vectorizer=<value> - Select the vector-
ization strategy
=none - No Vectorization
=polly - Polly internal vectorizer
=stripmine
- Strip-mine outer loops for the loop-vectorizer to trigger
llvm-rtdyld 11 January 2022 LLVM-RTDYLD(1)
Generated by dwww version 1.14 on Fri Jan 24 09:46:06 CET 2025.